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Wide Bandwidth Yaw Rate Gyroscope with SPI ADIS16060
FEATURES
Complete angular rate digital gyroscope 14-bit resolution Scalable measurement range Initial range: 80/sec (typical) Increase range with external resistor Z-axis (yaw rate) response SPI digital output interface High vibration rejection over wide frequency 2000 g-powered shock survivability 1 kHz bandwidth Selectable using external capacitor Externally controlled self-test Internal temperature sensor output Dual auxiliary 14-bit ADC inputs Absolute rate output for precision applications 5 V single-supply operation 8.2 mm x 8.2 mm x 5.2 mm package -40C to +105C operation RoHS compliant
GENERAL DESCRIPTION
The ADIS16060 is a yaw rate gyroscope with an integrated serial peripheral interface (SPI). It features an externally selectable bandwidth response and scalable dynamic range. The SPI port provides access to the rate sensor, an internal temperature sensor, and two external analog signals (using internal ADC). The digital data available at the SPI port is proportional to the angular rate about the axis that is normal to the top surface of the package. An additional output pin provides a precision voltage reference. A digital self-test function electromechanically excites the sensor to test the operation of the sensor and the signal-conditioning circuits. The ADIS16060 is available in an 8.2 mm x 8.2 mm x 5.2 mm, 16-terminal, peripheral land grid array (LGA) package.
APPLICATIONS
Platform stabilization Image stabilization Guidance and control Inertia measurement units Robotics
FUNCTIONAL BLOCK DIAGRAM
FILT RATE VCC
ADIS16060
RATE SENSOR SCLK DIN DIGITAL CONTROL DOUT MSEL1 MSEL2
TEMPERATURE SENSOR
MUX
14-BIT ADC
AIN1 AIN2
07103-001
GND
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved.
ADIS16060 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ........................................................................ 9 Analog-to-Digital Converter Input............................................ 9 Rate Sensitive Axis ....................................................................... 9 Basic Operation .............................................................................. 10 Serial Peripheral Interface (SPI)............................................... 10 Output Data Formatting............................................................ 10 ADC Conversion........................................................................ 10 Applications Information .............................................................. 11 Supply and Common Considerations ..................................... 11 Setting Bandwidth...................................................................... 11 Increasing Measurement Range ............................................... 11 Dynamic Digital Sensitivity Scaling ........................................ 11 Temperature Measurements ..................................................... 11 Self-Test Function ...................................................................... 11 Outline Dimensions ....................................................................... 12 Ordering Guide .......................................................................... 12
REVISION HISTORY
1/08--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADIS16060 SPECIFICATIONS
TA = 25C, VCC = 5 V, angular rate = 0/sec, COUT = 0.01 F, 1 g, unless otherwise noted. Table 1.
Parameter SENSITIVITY Dynamic Range 2 Initial Change Over Temperature 3 Nonlinearity NULL Initial Change Over Temperature3 Turn-On Time Linear Acceleration Effect Voltage Sensitivity NOISE PERFORMANCE Rate Noise Density FREQUENCY RESPONSE 3 dB Bandwidth (User-Selectable) 4 Sensor Resonant Frequency SELF-TEST RESPONSE Positive Self-Test 5 Negative Self-Test5 TEMPERATURE SENSOR Reading at 298 K Scale Factor LOGIC INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN (DIN) Input Capacitance, CIN (MSEL1, MSEL2 ) ANALOG INPUTS Resolution Integral Nonlinearity Differential Nonlinearity Offset Error Offset Error Temperature Drift Gain Error Gain Error Temperature Drift Input Voltage Range Leakage Current DIGITAL OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL CONVERSION RATE Conversion Time Throughput Rate Conditions Full-scale range over specifications range Clockwise rotation is positive output, TA = -40C to +85C VCC = 4.75 V to 5.25 V Best fit straight line Nominal 0/sec output is 8192 LSB VCC = 4.75 V to 5.25 V Power on to 0.5/sec of final value Any axis VCC = 4.75 V to 5.25 V @ 25C COUT = 0 F 1 14.5 See Table 5 See Table 5 7700 Proportional to absolute temperature 0.7 x VCC Typically 10 nA -1 8 5 For VIN < VCC 14 Best fit straight line No missing codes to 13 bits -6 -1 -10 0.3 -40 0.3 0 1 ISOURCE = 500 A ISINK = 500 A VCC - 0.3 0.4 10 100 VCC +40 +6 +6 +10 Bits LSB LSB mV ppm/C mV ppm/C V nA V V s kSPS 0.8 +1 +6226 -6226 8192 0.034 8684 Min 1 50 0.0110 Typ 80 0.0122 3 0.1 -44 0.11 10 0.1 0.5 0.04 1000 +44 Max Unit /sec /sec/LSB % /sec /sec /sec/C ms /sec/g /sec/V /sec/Hz Hz kHz LSB LSB LSB K/LSB V V A pF pF
0.0134
Rev. 0 | Page 3 of 12
ADIS16060
Parameter POWER SUPPLY VCC VCC Quiescent Supply Current Power Dissipation TEMPERATURE RANGE
1
Conditions All at TA = -40C to +85C VCC @ 5 V, 50 kSPS sample rate VCC @ 5 V, 50 kSPS sample rate Operation
Min 1 4.75
Typ 5 4.3 22
Max 5.25 6.5 33 +105
Unit V mA mW C
-40
All minimum and maximum specifications are guaranteed. Typical specifications are neither tested nor guaranteed. 2 Dynamic range is the maximum full-scale measurement range possible, including output swing range, initial offset, sensitivity, offset drift, and sensitivity drift at 5 V supply. 3 Defined as the output change from ambient to maximum temperature, or ambient to minimum temperature. 4 Frequency at which the response is 3 dB down from dc response. Bandwidth = 1/(2 x x 200 k x COUT). For COUT = 0.01 F, bandwidth = 80 Hz. 5 Self-test response varies with temperature.
Rev. 0 | Page 4 of 12
ADIS16060
TIMING SPECIFICATIONS
TA = 25C, angular rate = 0/sec, unless otherwise noted. 1 Table 2. Read/Output Sequence
Parameter Serial Clock Frequency Throughput Rate MSEL1 Falling to SCLK Low MSEL1 Falling to SCLK Rising SCLK Falling to Data Remains Valid MSEL1 Rising Edge to DOUT High Impedance SCLK Falling to Data Valid Acquisition Time DOUT Fall Time DOUT Rise Time Data Setup Time SCLK Falling Edge to MSEL2 Rising Edge Data Hold Time
1
Figure Reference See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 3 See Figure 3 See Figure 3
Symbol tCYC tCSD tSUCS tHDO tDIS tEN tACQ tF tR t5 t7 t6
Min
Typ
Max 2.9 100 0
20 5
16 14 16 11 11 5 0
100 50 25 25
400
5 0 4.5
Unit MHz kHz s ns ns ns ns ns ns ns ns ns ns
Guaranteed by design. All input signals are specified with tR = tF = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V. The 5 V operating range spans from 4.75 V to 5.25 V.
Timing Diagrams
tCYC
MSEL1 COMPLETE CYCLE
tSUCS
POWER DOWN SCLK 1 4 5
tACQ
tCSD
DOUT HIGH-Z 0
tEN
tHDO
D8 D7 D6 D5 D4 D3 D2 D1 D0 0
tDIS
HIGH-Z
07103-002
D13 D12 D11 D10 D9
(MSB) NOTE: A MINIMUM OF 20 CLOCK CYCLES ARE REQUIRED FOR 14-BIT CONVERSION.
(LSB)
Figure 2. Serial Interface Timing Diagram-Read/Output Sequence (CPOL = 0, CPHA = 0)
t7
MSEL2
t5 t6
SCLK
DIN
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 NOTE: THE LAST EIGHT BITS CLOCKED IN ARE LATCHED WITH THE RISING EDGE OF THE MSEL2 LINE.
07103-003
Figure 3. Serial interface Timing-Input/Configuration Sequence (CPOL = 0, CPHA = 1)
Rev. 0 | Page 5 of 12
ADIS16060 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Acceleration (Any Axis, Unpowered, 0.5 ms) Acceleration (Any Axis, Powered, 0.5 ms) VCC to GND VCC to GND Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND Operating Temperature Range Storage Temperature Range Rating 2000 g 2000 g -0.3 V to +6.0 V -0.3 V to VCC + 0.3 V -0.3 V to VCC + 0.3 V -0.3 V to +7.0 V -0.3 V to VCC + 0.3 V -40C to +105C -65C to +150C
Stresses above those listed under the Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Drops onto hard surfaces can cause shocks of greater than 2000 g and exceed the absolute maximum rating of the device. Care should be exercised in handling the device to avoid damage.
ESD CAUTION
Rev. 0 | Page 6 of 12
ADIS16060 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
MSEL1 MSEL2
16 15 14 13
GND
VCC
DIN
GND
PIN 1 INDICATOR
2.5050 BSC 8x
12
1
3.6865 BSC 8x
ADIS16060
TOP "LOOK THROUGH" VIEW (Not to Scale)
DOUT
10
11
SCLK
GND
0.6700 BSC 12x
2
GND
3
NC
AIN2
7.373 BSC 2x
5.010 BSC 4x
4
5
6
7
8
RATE
FILT
Figure 4. Pin Configuration
07103-004
NOTES 1. NC = NO CONNECT 2. THIS IS NOT AN ACTUAL "TOP VIEW," AS THE PINS ARE NOT VISIBLE FROM THE TOP. THIS IS A LAYOUT VIEW, WHICH REPRESENTS THE PIN CONFIGURATION, IF THE PACKAGE IS LOOKED THROUGH FROM THE TOP. THIS CONFIGURATION IS PROVIDED FOR PCB LAYOUT PURPOSES.
AIN1
VCC
9
1.000 BSC 16x
0.5000 BSC 16x
Figure 5. Second-Level Assembly Pad Layout
Table 4. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1
Mnemonic DIN SCLK DOUT NC RATE FILT VCC AIN1 AIN2 GND GND GND GND VCC MSEL2 MSEL1
Type 1 I I O O I S I I S S S S S I I
Description SPI Data Input. SPI Serial Clock. SPI Data Output. No Connect. Buffered Analog Output. Represents the angular rate signal. External Capacitor Connection to Control Bandwidth. Power Supply. External Analog Input Channel 1. External Analog Input Channel 2. Ground. Ground. Ground. Ground. Power Supply. SPI, Mode Select 2. Used for data input functions. SPI, Mode Select 1. Used for data output functions.
I = input; O = output; S = power supply.
Rev. 0 | Page 7 of 12
07103-005
ADIS16060 TYPICAL PERFORMANCE CHARACTERISTICS
0.18 6800
DIGITAL RATE OUTPUT RESPONSE (LSB)
07103-020
0.16
6600 6400 6200 6000 5800 5600 5400 5200 5000 -40 -20 0 20 40 60 80 100 120
07103-009
07103-011
PERCENT OF POPULATION (%)
0.14 0.12 0.10 0.08 0.06 0.04 0.02
-44 -40 -36 -32 -28 -24 -20 -16 -12 -8 -4 0 4 8 12 16 20 24 28 32 36 40 44
0
4800 -60
BIAS (/sec)
TEMPERATURE (C)
Figure 6. Initial Bias Error Distribution, 25C, VCC = 5 V
Figure 9. Positive Self-Test Response vs. Temperature, VCC = 5 V
0.30
DIGITAL RATE OUTPUT RESPONSE (LSB)
-4800 -5000 -5200 -5400 -5600 -5800 -6000 -6200 -6400 -6600 -40 -20 0 20 40 60 80 100 120
07103-010
PERCENT OF POPULATION (%)
0.25
0.20
0.15
0.10
0.05
07103-021
-0.60 -0.55 -0.50 -0.45 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60
0
-6800 -60
BIAS DRIFT OVER TEMPERATURE (/sec/C)
TEMPERATURE (C)
Figure 7. Bias Drift Over -40C to +85C, VCC = 5 V
Figure 10. Negative Self-Test Output Response vs. Temperature, VCC = 5 V
0.04 0.03
0.1
SENSITIVITY ERROR (%)
0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -60 - 1 + 1
ROOT ALLEN VARIANCE (/sec)
07103-008
0.01
0.001 1 10 Tau (C) 100 1000
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
Figure 8. Sensitivity Drift vs. Temperature, VCC = 5 V
Figure 11. Allen Variance, 25C, VCC = 5 V
Rev. 0 | Page 8 of 12
ADIS16060 THEORY OF OPERATION
The ADIS16060 operates on the principle of a resonator gyroscope. Two polysilicon sensing structures each contain a dither frame that is electrostatically driven to resonance. This generates the necessary velocity element to produce a Coriolis force while rotating. At two of the outer extremes of each frame, orthogonal to the dither motion, are movable fingers that are placed between fixed pickoff fingers to form a capacitive pickoff structure that senses Coriolis motion. The resulting signal is fed to a series of gain and demodulation stages that produce the electrical rate signal output. The rate signal is then converted to a digital representation of the output on the SPI pins. The dual-sensor design provides linear acceleration (vibration, shock) rejection. Fabricating the sensor with the signalconditioning electronics preserves signal integrity in noisy environments. The electrostatic resonator requires 14 V to 16 V for operation. Because only 5 V is typically available in most applications, a charge pump is included on chip. After the demodulation stage, a singlepole, low-pass filter on the chip is used to limit high frequency artifacts before final amplification. The frequency response is dominated by the second low-pass filter, which is set by adding capacitance across RATE and FILT. During the acquisition phase, the impedance model for AINx is a parallel combination of the capacitor CPIN and the network formed by the series connection of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically 600 and is a lumped component made up of some serial resistors and the on resistance of the switches. CIN is typically 30 pF and mainly functions as the ADC sampling capacitor. During the conversion phase, when the switches are open, the input impedance is limited to CPIN. RIN and CIN make a 1-pole, low-pass filter that reduces undesirable aliasing effects and limits the noise. When the source impedance of the driving circuit is low, the ADC input can be driven directly. Large source impedances significantly affect the ac performance, especially THD. The dc performances are less sensitive to the input impedance.
RATE SENSITIVE AXIS
RATE AXIS LONGITUDINAL AXIS POSITIVE MEASUREMENT DIRECTION 8
07103-019
1
ANALOG-TO-DIGITAL CONVERTER INPUT
Figure 12 shows an equivalent circuit of the input structure of the ADIS16060 auxiliary ADC. The two diodes, D1 and D2, provide ESD protection for the analog inputs, AINx (AIN1 and AIN2). Care must be taken to ensure that the analog input signal does not exceed the supply rails by more than 0.3 V, because exceeding this level causes these diodes to become forward-biased and to start conducting current. However, these diodes can handle a forward-biased current of 130 mA maximum. For instance, these conditions may eventually occur when the input signals exceed either VCC or GND.
VDD D1 AINx CPIN GND D2
07103-018
LATERAL AXIS
45
Figure 13. Rate Signal Increases with Clockwise Rotation
RIN
CIN
Figure 12. Equivalent Analog Input Circuit
Rev. 0 | Page 9 of 12
ADIS16060 BASIC OPERATION
The ADIS16060 is designed for simple integration into industrial system designs, requiring only a 5 V power supply, two mode select lines, and three serial communications lines. The SPI handles all digital I/O communication in the ADIS16060.
Output Data Access
Use Table 2 and Figure 2 to determine the appropriate timing considerations for reading output data.
SERIAL PERIPHERAL INTERFACE (SPI)
The ADIS16060 SPI port includes five signals: Mode Select 1 (MSEL1), Mode Select 2 (MSEL2), serial clock (SCLK), data input (DIN), and data output (DOUT). The MSEL1 line is used when reading data out of the sensor (DOUT), and the MSEL2 line is used when configuring the sensor (DIN).
OUTPUT DATA FORMATTING
All of the output data is in an offset-binary format, which in this case, means that the ideal output for a zero rate condition is 8192 codes. If the sensitivity is equal to +0.0122/sec/LSB, a rate of +10/sec results in a change of 820 codes, and a digital rate output of 9012 codes. If an offset error of -20/sec is introduced, the output is reduced by 1639 codes (if typical sensitivity is assumed), resulting in a digital rate output of 6552 codes.
Selecting Output Data
Refer to Table 5 to determine the appropriate DIN bit sequence based on the required data source. Table 2 and Figure 3 provide the necessary timing details for the input configuration sequence. After the MSEL2 goes high, the last eight DIN bits are loaded into the internal control register, which represents DB0 to DB7 in Table 5.
ADC CONVERSION
The internal successive approximation ADC begins the conversion process on the falling edge of MSEL1 and starts to place data MSB first on the DOUT line at the 6th falling edge of SCLK, as shown in Figure 2. The entire conversion process takes 20 SCLK cycles. After MSEL1 goes high, the acquisition process starts in preparation for the next conversion cycle.
Table 5. DIN Configuration Bit Assignments
Action Measure Angular Rate (Gyro) Measure Temperature Measure AIN2 Measure AIN1 Set Positive Self-Test and Output for Angular Rate Set Negative Self-Test and Output for Angular Rate DB7 0 0 1 0 0 0 DB6 0 0 0 1 0 0 DB5 1 0 0 0 1 1 DB4 0 1 0 0 0 0 DB3 0 0 0 0 0 0 DB2 0 0 0 0 0 0 DB1 0 0 0 0 1 0 DB0 0 0 0 0 0 1
Rev. 0 | Page 10 of 12
ADIS16060 APPLICATIONS INFORMATION
SUPPLY AND COMMON CONSIDERATIONS
NOISE DENSITY (/sec/ Hz) 1
Power supply noise and transient behaviors can influence the accuracy and stability of any sensor-based measurement system. The ADIS16060 provides 0.2 F of decoupling capacitance on the VCC pin. Depending on the level of noise present in the power supply of the system, the ADIS16060 may not require any additional decoupling capacitance for this supply.
0.1
0.01
SETTING BANDWIDTH
External Capacitor COUT is used in combination with the onchip ROUT resistor to create a low-pass filter to limit the bandwidth of the ADIS16060 rate response. The -3 dB frequency set by ROUT and COUT is
f OUT =
0.001
100
1k FREQUENCY (Hz)
10k
100k
(2 x x ROUT x C OUT )
1
Figure 14. Noise Spectral Density with 2-Pole, Low-Pass Filter (40 Hz and 250 Hz)
and can be well controlled because ROUT has been trimmed during manufacturing to be 200 k 5%. Setting the range with an external resistor impacts ROUT as follows:
DYNAMIC DIGITAL SENSITIVITY SCALING
This device supports in-system, dynamic, digital sensitivity scaling.
(200 k x R EXT ) ROUT = (200 k + R EXT )
TEMPERATURE MEASUREMENTS
When using the temperature sensor, an acquisition time of greater than 40 s helps to ensure proper setting and measurement accuracy. See Table 2 and Figure 2 for details on the definition of acquisition time.
In general, an additional hardware or software filter is added to attenuate high frequency noise arising from demodulation spikes at the gyro's 14 kHz resonant frequency. The noise spikes at 14 kHz can be clearly seen in the power spectral density curve shown in Figure 14.
SELF-TEST FUNCTION
Exercising the self-test function is simple, as shown in this example. 1. 2. 3. 4. 5. Configure using DIN = 00100010 (positive self-test, rate selected). Read output. Configure using DIN = 00100000 (positive self-test off, rate selected) Read output. Calculate the difference between Step 2 and Step 4, and compare this with the specified self-test output changes in the Specifications section.
INCREASING MEASUREMENT RANGE
Scaling the measurement range requires the addition of a single resistor, connected across the RATE and FILT pins. The following equation provides the proper relationship for selecting the appropriate resistor:
R EXT =
200 k -1
where is the increase in range.
Exercising the negative self-test requires changing the sequence in Step 1 to DIN = 00100001.
Rev. 0 | Page 11 of 12
07103-118
0.0001 10
ADIS16060 OUTLINE DIMENSIONS
8.35 MAX 2.505 BSC (8x) 5.010 BSC (4x) PIN 1 INDICATOR 0.873 BSC (16x)
1
13 12
16
8.20 TYP
7.373 BSC (2x) 0.797 BSC (12x)
9 8 5 4
TOP VIEW
7.00 TYP
0.200 MIN (ALL SIDES)
BOTTOM VIEW
0.373 BSC (16x)
5.20 MAX
022107-B
SIDE VIEW
Figure 15. 16-Terminal Stacked Land Grid Array [LGA] (CC-16-1) Dimensions shown in millimeters
ORDERING GUIDE
Model ADIS16060BCCZ 1 ADIS16060/PCBZ1
1
Temperature Range -40C to +105C
Package Description 16-Terminal Stacked Land Grid Array (LGA) Evaluation Board
Package Option CC-16-1
Z = RoHS Compliant Part.
(c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07103-0-1/08(0)
Rev. 0 | Page 12 of 12

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